What logic function does this CMOS gate perform?
1.Design the logic diagram of a CMOS two input NOR gate, Remember to specify the dimensions of all the devices.
Comment on its characteristics of interest. Can you predict any problems when it is used.
Compare a CMOS circuit designed with NOR gates with one based on NAND gates. Which is better and why?
2. The inverter in assignment 2 of Experiment 1 is used as a buffer to drive a data line in polysilicon of length 600 microns and width 3 microns, which is in turn connected to one input of an ALU of input capacitance 40ff. Simulate the effect of this distributed RC on the circuit performance, using the following process parameters :
RPOLY: 30 ohms /square
CPOLY/FOX: 0.04 ff /sq. micron
Note that you must find a satisfactory model for the distributed RC.
3.Compile a SPICE deck for the circuit shown below.
Add a load of 100ff and analyse the transient behaviour of the circuit using a piece-wise linear input waveform which starts at 0v at time 0 , increases linearly to 5V at time 0.5us then returns to its original value of 0v after a further 0.5us . Comment on the resulting transfer characteristics.
What is this type of circuit known as and what is its use in digital systems?
Note :
If you encounter non-convergence problem, add the following additional capacitance parameters in the .model file : Cgdo=4.0e-11 Cgso=4.0e-11 Cgbo=2.0e-11
Repeat the above analysis with the output of the above circuit feeding the input of the circuit shown below. Use the same load as above.
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